1.5-bit mismatch-insensitive MDAC with reduced input capacitive loading
نویسندگان
چکیده
A new mismatch insensitive 1.5-bit multiplying digital–analogue converter (MDAC) is proposed. This circuit samples the input in closed-loop form using the opamp in non-inverting configuration; hence, only the parasitic input capacitance loads the previous stage. This technique uses a fully-differential four-input OTA instead of two single-ended two-input OTAs to further improve power consumption and matching.
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